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Design and implementation of an on-line CFA demosaicking core

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dc.contributor Graduate Program in Systems and Control Engineering.
dc.contributor.advisor Yurdakul, Arda.
dc.contributor.author Kabukcu, Gökhan.
dc.date.accessioned 2023-03-16T11:34:47Z
dc.date.available 2023-03-16T11:34:47Z
dc.date.issued 2009.
dc.identifier.other SCO 2009 K33
dc.identifier.uri http://digitalarchive.boun.edu.tr/handle/123456789/15648
dc.description.abstract The thesis introduces a low-cost algorithm for improving the demosaicking process in the texture areas such as one-pixel patterns. The algorithm rst detects di cult texture regions. After the detection process is completed, the algorithm demosaicks the texture areas using special demosaicking operations whereas non-texture regions are restored using some of the existing demosaicking approaches. In this way, the quality of the texture areas in demosaicked images can be improved up to 70% while the computational complexity of the original demosaicking solution is increased only slightly. The new algorithm is implemented as a core by using VHDL (Very High Speed Integrated Circuit Hardware Description Language) language. The operational veri cation of the VHDL implementation is performed on FPGA (Field Programmable Gate Array). The Virtex-II XC2V500 device is selected in the implementation. The core is capable of processing 1000 x 1000 pixels real-time digital video and 1000 x n pixels digital still images. The system operates at 25 MHz frequency and can process 25 images per second which is a su cient speed for video processing.
dc.format.extent 30cm.
dc.publisher Thesis (M.S.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2009.
dc.relation Includes appendices.
dc.relation Includes appendices.
dc.subject.lcsh Interpolation.
dc.subject.lcsh Image processing -- Digital techniques.
dc.title Design and implementation of an on-line CFA demosaicking core
dc.format.pages xiii, 70 leaves;


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